SW74F1071 same as Fairchild Semiconductor 74F1071 18bit undershoot overshoot Schottky Diode Clamp array with ESD Protection Device

SW74F1071 is same as Fairchild Semiconductor 74F1071, a 18-bit undershoot/overshoot clamp which is designed to limit bus voltages and also to protect more sensitive devices from electrical overstress due to electrostatic discharge (ESD). The inputs of the device aggressively clamp voltage excursions nominally at 0.5V below and 7V above ground. integrated clamp Schottky diode network available in surface mount package and as known good die KGD is a low power and low noise solution for reducing reflections on high speed data lines. Reflection on high speed data lines leads to undershoot and overshoot disturbances which may result in improper system operation. Resistor terminations used in parallel or in series with the outputs, when used to terminate high speed data lines, can increase power consumption, degrade the high level output and lower noise immunity or increase propagation delays. Schottky diode termination is the best overall solution for applications in which power consumption and noise immunity are critical considerations. Clamp Schottky diode networks provide optimized lead inductance and parasitic capacitive effects (see added ground pins), improved forward voltage and crosstalk attributes, and best termination performance characteristics at high data transmission rates. Schottky diode networks are manufactured using Semiconwell's in house high reliability semiconductor manufacturing processes. All semiconductor devices employ precision doping via ion implantation, silicon nitride junction passivation, platinum silicided contacts and gold interconnect metallization for best performance and reliability. MNOS capacitors and Tantalum Nitride resistors are easily integrated with Schottky diodes to provide complete standard and custom RCD solutions. In die form, these products are ideal for hybrid and multi chip module applications. In packaged form, these products are the best solution where space and weight are a concern. List prices are for standard products, available from stock. List prices for other quantities and tolerances are available on line through Instant Quote. For standard products available from stock, there is a minimum line item order. For custom products please inquire by contacting SEMICONWELL technical sales. No rights can be derived from pricing information provided on this website. Such information is indicative only, is showed for budgetary use only and subject to change by SEMICONWELL at any time and without notice. For special packaging or custom configurations, contact sw_sales@semiconwell.com. 32 integrated diodes in a single package offers 16 channels, dual rail clamping action.Provides proper bus termination independent of external line or card loading conditions. Schottky diode technology; excellent forward voltage and reverse recovery characteristics. Saves board space and eases layout in space critical bus termination applications versus discrete approaches. PCI v2.1 Bus Termination for Intel-based Pentium® and Pentium Pro systems. Local high speed bus termination for all popular RISC and embedded microprocessor applications. High speed memory DRAM, SDRAM, EPROM memory bus termination. Termination of high speed CLOCK lines of multiple



SEMICONWELL Integrated Passive Networks		18bit Undershoot/Overshoot Clamp and ESD Protection Device SW74F1071

FEATURES

APPLICATIONS

SCHEMATIC

18bit array structure in 20-pin package

Fast Bipolar voltage damping action

Dual center pin grounds for min inductance

Robust design for ESD protection

Low input capacitance

Optimum voltage clamping for 5V CMOS/TTL applications

SHORT PRODUCT APPLICATION NOTE

SW74F1071 is same as Fairchild Semiconductor 74F1071, a 18-bit undershoot/overshoot clamp designed to limit excessive bus voltage and protects sensitive devices from electrical overstress due to electrostatic discharge (ESD). The inputs aggressively clamp voltage excursions nominally at 0.5V below and 7V above ground.

SEMICONDUCTOR-THIN FILM MANUFACTURING PROCESS DESCRIPTION

Integrated passive networks are manufactured using advanced thin film technologies including ultra -stable and self passivating Tantalum Nitride resistors, gold interconnect metallization and reliable MNOS capacitors to achieve excellent uniformity, performance and reliability. Thin film resistor technology is the preferred solution for all applications that require low noise, long term stability and excellent performance at very high frequencies. Semiconwell employs proprietary thin film technologies for deposition of a wide range of sheet resistance films from 1W/sq to 10,000 W/sq. All Semiconwell's products are available in die form and as KGD, known good die and are ideal for high reliability hybrid and multi chip module applications. Besides thin film resistors, Semiconwell integrates capacitors, Schottky diodes, Zener diodes and transistors. Integrated passive and active networks are manufactured using Semiconwell's in house high reliability semiconductor manufacturing processes. All semiconductor devices employ precision doping via ion implantation, silicon nitride junction passivation, platinum silicided contacts and gold interconnect metallization for best performance and reliability. MNOS capacitors and Tantalum Nitride resistors are easily integrated with Schottky diodes to provide complete standard and custom RCD solutions. In die form, these products are ideal for hybrid and multi chip module applications. In packaged form, these products are the best solution where space and weight are a concern.

ABSOLUTE MAXIMUM RATINGS@ 25 °C (unless otherwise stated)
Symbol	Parameter	Value	Unit
TSTG	Storage Temperature	–65 to +150	°C
Tamb	Ambient Temperature Under Bias	–65 to +125	°C
TJ	Junction Temperature Under Bias	–65 to +150	°C
Vin	Input Voltage(1)	–0.5 to +6	V
Iin	Input Current(1)	–200 to +50	mA
ESD(2)	Human Body Model (MIL-STD-883D method 3015.7)	±10	kV
ESD(2)	IEC 801-2	±6	kV
ESD(2)	Machine Model (EIAJIC-121-1981)	±2	kV
	DC Latchup Source Current (JEDEC Method 17)	±500	mA
	Package Power Dissipation @ +70°C SOIC Package	800	mW

RECOMMENDED OPERATING CONDITIONS
TA	Free Air Ambient Temperature	0 to 70	°C
VZ	Reverse Bias Voltage	0 to 5.25	VDC

Stresses beyond listed absolute maximum ratings may cause permanent damage to the device.

device reliability.The absolute maximum ratings are stress ratings only. 1. Voltage ratings may be exceeded if current ratings and junction temperature and power consumption ratings are not exceeded. 2. ESD Rating for Direct contact discharge using ESD Simulation Tester. Higher rating may be realized in the actual application.

ELECTRICAL CHARACTERISTICS@ 25 °C (unless otherwise stated)
SYMBOL	PARAMETER	Test Condition	MIN	TYP	MAX	UNITS
IIH	Input HIGH Current	VIN = 5.25V; Untested Input @ GND, TA = +25°C		1.5	10	μA
IIH	Input HIGH Current	VIN = 5.25V; Untested Input @ GND, TA = 0°C to +70°C			50	μA
IIH	Input HIGH Current	VIN = 5.5V; Untested Input @ GND ,TA = +25°C		3	20	V
IIH	Input HIGH Current	VIN = 5.5V; Untested Input @ GND, TA = 0°C to +70°C			100	V
VZ	Reverse Voltage	IZ = 1mA; Untested Inputs @ GND, TA = +25°C	6.6	6.9	7.2	V
VZ	Reverse Voltage	IZ = 1mA; Untested Inputs @ GND, TA = 0°C to +70°C	5.9		7.7	V
VZ	Reverse Voltage	IZ = 50mA; Untested Inputs @ GND TA = +25°C		7.1	7.5	V
VZ	Reverse Voltage	IZ = 50mA; Untested Inputs @ GND TA = 0°C to +70°C			8.0	V
VF	Forward Voltage	IF = –18mA; Untested Inputs @ 5V , TA = +25°C	–0.3	–0.6	–0.9	V
VF	Forward Voltage	IF = –18mA; Untested Inputs @ 5V , TA = 0°C to +70°C	–0.3		–0.9	V
VF	Forward Voltage	IF = –200mA; Untested Inputs @ 5V	–0.5	–1.1	–1.5	V
VF	Forward Voltage	IF = –200mA; Untested Inputs @ 5V	–0.5		–1.5	V
ICT	Adjacent Input Crosstalk	TA = +25°C			3	%
CIN	Input Capacitance (small signal @ 1MHz)	VBIAS = 0 VDC , TA = +25°C		25		pF
CIN	Input Capacitance (small signal @ 1MHz)	VBIAS = 5 VDC , TA = +25°C		13		pF

GENERAL DIE INFORMATION
Substrate	Thickness (mils)	Die size (mils)	Bonding pads	Backside metal
Silicon	10±2	86 x 82 ±3	4x4 mils, 3mm thick, 99.99% electroplated gold with a TiW barrier	Au/Si compatible with eutectic and conductive epoxy die attach.
All Semiconwell products are available in die form for chip and wire hybrid circuits and multi chip modules applications. Typical delivery for die products is 6 weeks ARO. For Chip Scale Packaged (CSP) devices consult factory for an update on availability of certain products.

SCHOTTKY DIODES	RESISTORS	CAPACITORS
Schottky diodes offer basic ESD protection, with low forward voltage, low leakage and low power dissipation in OFF state. Schottky Diodes exhibit low junction capacitance C_Tand low on resistance R_DON.	Ultra stable TaN with low TCR <75ppm/°C typical. For Rsq<10W/sq and Rsq>500W/sq, resistive material is proprietary. Power rating/resistor max 100mW for R<1KW and 25mW for R>1KW. Standard tolerance is ±5%.	Silicon nitride dielectric, MNOS capacitors exhibit high stability, low temperature coefficients, low leakage <10nA and high BV>50V.

DIE LAYOUT	PACKAGE PIN OUT
Layout pending
Vin=1,2,3,4,5,7,8,9,10,11,12,13,14,15,17,18,19,20
GND=6,16

STANDARD PRODUCTS ORDERING INFORMATION

SW PART #	SOIC-20	SSOP-20	TSSOP-20
SW74F1071	SW74F1071SC	SW74F1071MSA	SW74F1071MTC

Delivery for packaged RCD standard products is 6-8 weeks ARO. Certain items may be available from stock. For standard products available from stock, there is a minimum line item order of $250.0. Inventory is periodically updated. For 2500pc or larger orders, all surface mount packaged devices are shipped in tape on reel (T/R). For smaller quantities, it may vary. Samples are available only for customers that have issued firm orders pending qualification of product in a particular application. On line Orders have to be verified, accepted and acknowledged by Semiconwell sales department in writing before, becoming non cancelable binding contracts.

Semiconwell guarantees continuous supply and availability of any of it's standard products provided minimum order quantities are met.

SEMICONWELL has made every effort to have this information as accurate as possible. However, no responsibility is assumed by SEMICONWELL for its use, nor for any infringements of rights of third parties which may result from its use. SEMICONWELL reserves the right to revise the content or modify its product line without prior notice. SEMICONWELL products are not authorized for and should not be used within support systems which are intended for surgical implants into the body, to support or sustain life, in aircraft, space equipment, submarine, or nuclear facility applications without the specific written consent.

Last update: April 15, 2011

SEMICONWELL www.semiconwell.com Tel:(408)986-8026 Fax:(408)986-8027

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