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PACVGA201 PAC VGA201 same as SWVGA200, VGA PORT ESD PROTECTED TERMINATION manufactured by Semiconwell and is pin compatible with PACVGA 201, The SWVGA-200 incorporates 7 channels of ESD protection for signal lines commonly found in a VGA port
VGA PORT ESD PROTECTED TERMINATION SWVGA-201
FEATURES APPLICATIONS
7 channels of ESD protection for all VGA port connector pins meeting IEC-1000-4-2 Level-4 ESD requirements (8KV contact discharge) ESD protection for VGA (video) port in PCs and notebooks.
Very low loading capacitance from ESD protection diodes, 4pF typical
TTL to CMOS level-translating buffers for the HSYNC and VSYNC lines
75 W termination resistors for VIDEO lines (matched to 1% typ.)
Bi-directional level shifting N-channel FETs provided for DDC_CLK&DDC_DATA channels
SHORT PRODUCT APPLICATION NOTE
The SWVGA-201 incorporates 7 channels of ESD protection for signal lines commonly found in a VGA port . ESD protection is implemented with current steering diodes designed to safely handle the high peak surge currents associated with the IEC-1000-4-2 Level-4 ESD Protection Standard (8KV contact discharge). When a channel is subjected to an electrostatic discharge, the ESD current pulse is diverted via the protection diodes into the positive supply rails or ground where they may be safely dissipated. Separate positive supply rails are provided for the VIDEO,DDC and SYNC channels to facilitate interfacing with low voltage Video Controller ICs and provide design flexibility in multi-supply-voltage environments. Two non-inverting drivers provide buffering for the HSYNC and VSYNC channels from the Video Controller IC(SYNC1,SYNC2).These buffers accept TTL input levels and convert them to CMOS output levels that swing between Ground and VCC3. When the PWR_UP input is LOW the SYNC outputs are driven LOW. An internal diode (D1 in schematic below) is also provided so that VCC2 is derived from VCC3. (VCC2 does not require an external power supply input.) In applications where VCC3 may be powered down, diode D1 blocks any DC current path from the DDC_OUT pins back to the powered down VCC3 rail via the upper ESD protection diodes.
SEMICONDUCTOR-THIN FILM MANUFACTURING PROCESS DESCRIPTION
Integrated passive networks are manufactured using advanced thin film technologies including ultra -stable and self passivating Tantalum Nitride resistors, gold interconnect metallization and reliable MNOS capacitors to achieve excellent uniformity, performance and reliability. Thin film resistor technology is the preferred solution for all applications that require low noise, long term stability and excellent performance at very high frequencies. Semiconwell employs proprietary thin film technologies for deposition of a wide range of sheet resistance films from 1W/sq to 10,000 W/sq. All Semiconwell's products are available in die form and as KGD, known good die and are ideal for high reliability hybrid and multi chip module applications. Besides thin film resistors, Semiconwell integrates capacitors, Schottky diodes, Zener diodes and transistors. Integrated passive and active networks are manufactured using Semiconwell's in house high reliability semiconductor manufacturing processes. All semiconductor devices employ precision doping via ion implantation, silicon nitride junction passivation, platinum silicided contacts and gold interconnect metallization for best performance and reliability. MNOS capacitors and Tantalum Nitride resistors are easily integrated with Schottky diodes to provide complete standard and custom RCD solutions. In die form, these products are ideal for hybrid and multi chip module applications. In packaged form, these products are the best solution where space and weight are a concern.
ABSOLUTE MAXIMUM RATINGS
Reverse voltage VR Continuous IF IFRM for tw<100ms Max Power dissipation
7V 100mA 200 mA (20%duty cycle) 100mW@70°C/channel
Stresses beyond listed absolute maximum ratings may cause permanent damage to the device.
ABSOLUTE MAXIMUM RATINGS
PARAMETER VALUE UNITS
VCC1,VCC3 supply voltage GND-0.5, 6.0 V
DC Voltage at Inputs VIDEO_1,VIDEO_2,VIDEO_3 GND -0.5, VCC1 +0.5 V
DC Voltage at Inputs ,DDC_OUT1,DDC_OUT2 GND -0.5, VCC2 +0.5 V
DC Voltage at Inputs ,SYNC_IN1,SYNC_IN2 GND -0.5, VCC3 +0.5 V
Storage Temperature -40 to 150 °C
Operating Ambient Temperature 0 to 70 °C
Package Power Dissipation 0.75 W
ELECTRICAL CHARACTERISTICS
PARAMETER VALUE UNITS
VCC1 supply current , VCC1=5V max. 10 mA
VCC3 supply current, VCC2=VCC3=5V max. 10 mA
VCC4 supply current , VCC3=5V;SYNC inputs at GND or VCC3; PWR_UP pin at VCC3; SYNC outputs unloaded typ.10 mA
VCC3 supply current , VCC3=5V;SYNC inputs at 3.0V; PWR_UP pin at VCC3; SYNC outputs unloaded typ.200 mA
VCC2 pin open circuit voltage, No external current drawn;VCC2 voltage internally derived from VCC3 via diode D1 typ. VCC3-0.8 V
Logic high input voltage (Note 1); VCC3=5.0V min.2.0 V
Logic low input voltage (Note 1); VCC3=5.0V max.0.8 V
Logic high output voltage (Note 2); VCC3=5.0V;ICH=-4mA min.4.4 V
Logic low output voltage (Note 2); VCC3=5.0V;ICL=4mA max.0.4 V
Resistor value; PWR_UP, VCC3=5.0V min.0.5;typ.1;max.2 MW
Input current; VIDEO inputs;VCC1=5.0V; VIN=VCC1or GND max.1 µA
Input current;HSYNC,VSYNC inputs;VCC3=5.0V; VIN=VCC3or GND max.1 µA
Input capacitance (Note 4) VIDEO_1,VIDEO_2,VIDEO_3;VCC1=5.0V; VIN=2.5V; measured at 1M typ. 4.0 pF
Input capacitance (Note 4) VIDEO_1,VIDEO_2,VIDEO_3;VCC1=2.5V; VIN=1.25V; measured at 1M typ. 4.5 pF
SYNC drivers L-H propagation delay;CL=50 pF; VCC3=5V; Input tf and tf_5ns typ. 8; max. 12 ns
SYNC drivers H-L propagation delay;CL=50 pF; VCC3=5V; Input tf and tf_5ns typ. 8; max. 12 ns
SYNC drivers output rise&fall times;CL=50 pF; VCC3=5V; Input tf and tf_5ns typ. 7 ns
ESD withstand voltage (Note 3,4); VCC1=VCC2=VCC3=5V min.8 KV
Note 1: These parameters apply only to SYNC_IN1,SYNC_IN2 and PWR_UP. Note 2. These parameters apply only to SYNC_OUT1 and SYNC_OUT2. Note.3 Per the IEC-1000-4-2 ESD Standard, Level 4 contact discharge method. VCC1 ,VCC2 and VCC3 must be bypassed to GND via a low impedance ground plane with a 0.2µF or greater, low impedance , chip ceramic capacitor at each supply pin. ESD pulse is applied between the applicable pins and GND.ESD pulse can be positive or negative with respect to GND. Applicable pins are: VIDEO_1,VIDEO_2,VIDEO_3,SYNC_OUT1,SD1,SYNC_OUT2,SD2,DDC_OUT1 and DDC_OUT2. All other pins are ESD protected to industry standard 2KV per the Human Body Model (MIL-STD-883, Method 3015). Note 4.This parameter in guaranteed by design and characterization.
PIN DESCRIPTION
LEAD NAME
1 VCC3
2 VCC1
3 VIDEO_1
4 VIDEO_2
5 VIDEO_3
6 GND
7 POWER_UP
8 VCC2
9 DDC_OUT1
10 DDC_OUT2
11 SYNC_IN1
12 SYNC_OUT1
13 SYNC_IN2
14 SYNC_OUT2
15 SD1
16 SD2
GENERAL DIE INFORMATION
Substrate Thickness (mils) Die size (mils) Bonding pads Backside metal
SiO2 / Silicon 10±2 90 x 60 ±3 4x4 mils, 3mm thick, 99.99% electroplated gold with a TiW barrier Au/Si compatible with eutectic and conductive epoxy die attach.
All Semiconwell products are available in die form for chip and wire hybrid circuits and multi chip modules applications. Typical delivery for standard die products is 3-4 weeks ARO. For Chip Scale Packaged (CSP) devices consult factory for an update on availability of certain products.
DIODES RESISTORS CAPACITORS
Diodes offer basic ESD protection, with low forward voltage and low power dissipation. Diodes are small physically resulting low junction capacitance and low loading capacitance. Resistive material is ultra stable TaN with low TCR <75ppm/°C typical. For Rsq<10W/sq and Rsq>500W/sq, the resistive material is proprietary. Power rating/resistor max 100mW for R<1KW and 25mW for R>1KW. Standard tolerance is ±5%. Silicon nitride dielectric, MNOS capacitors exhibit high stability, low temperature coefficients, low leakage <10nA and high BV>50V.
DIE LAYOUT PACKAGE PIN OUT
Vin=3,4,5,6,11,12,13,14
Vss=die backside
Vss=1,8,9,16
Vdd=2,7,10,15
STANDARD PRODUCTS ORDERING INFORMATION
SOIC-16 QSOP-16 TSSOP-16 BARE DIE-16
SWVGA201-16SO SWVGA201-16QS SWVGA201-16TS SWVGA201-16BD
SW PART # QUANTITY SOIC-16 U/P($) QSOP-16 U/P($) TSSOP-16 U/P($) BARE DIE U/P($)
SWVGA201 5,000pc -16SO -16QS -16TS -16BD
SWVGA201 10,000pc -16SO -16QS -16TS -16BD
For products sold as bare tested die or known good die KGD, minimum order is 5000pc. Dice are 100% functional tested, visual inspected and shipped in antistatic waffle packs. For special die level KGD requirements, different packaging or custom configurations, contact sw_sales@semiconwell.com
Delivery for packaged RCD standard products is 6-8 weeks ARO. Certain items may be available from stock. For standard products available from stock, there is a minimum line item order of $250.0. Inventory is periodically updated. For 2500pc or larger orders, all surface mount packaged devices are shipped in tape on reel (T/R). For smaller quantities, it may vary. Samples are available only for customers that have issued firm orders pending qualification of product in a particular application. On line Orders have to be verified, accepted and acknowledged by Semiconwell sales department in writing before, becoming non cancelable binding contracts.
Semiconwell guarantees continuous supply and availability of any of it's standard products provided minimum order quantities are met.
SEMICONWELL has made every effort to have this information as accurate as possible. However, no responsibility is assumed by SEMICONWELL for its use, nor for any infringements of rights of third parties which may result from its use. SEMICONWELL reserves the right to revise the content or modify its product line without prior notice. SEMICONWELL products are not authorized for and should not be used within support systems which are intended for surgical implants into the body, to support or sustain life, in aircraft, space equipment, submarine, or nuclear facility applications without the specific written consent.
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